Computer systems typically store digital data on a rotating magnetic disk by manipulating the magnetic flux properties on the surface of the disk. Typically, during a write operation the digital data serve to modulate the current in a solenoid (coil) of a magnetic read/write head wherein a "0" bit induces current in a positive direction and a "1" bit induces current in a negative direction. The current passing through the coil generates a corresponding positive or negative magnetic field that magnetizes the surface of the disk in a forward or reverse direction as the disk spins underneath the write head. Because the magnetization of the disk's surface is hysteretic, the magnetic transitions that represent the digital data remain when the magnetic field from the head is removed. Consequently the digital data is stored on the disk even when the storage system is powered down. To read the stored digital data, the read/write head is again positioned over the disk's surface and, as the magnetic transitions pass under the head, the changing magnetic field induces a positive or negative current in the coil of the read/write head. The polarity and strength of the current (or voltage when passed through a resistor) induce pulses in an analog read signal which are detected and decoded into an estimated digital sequence. In the absence of errors, the estimated digital sequence will be the originally recorded digital sequence.
Detecting and decoding the pulses into an estimated digital sequence can be performed by a simple peak detector in a conventional analog read channel or, as in more recent designs, by a discrete time sequence detector in a sampled amplitude read channel. Discrete time sequence detectors are preferred over simple analog pulse detectors because they compensate for intersymbol interference (ISI) and are less susceptible to channel noise. As a result, discrete time sequence detectors increase the capacity and reliability of the storage system.
There are several well known discrete time sequence detection methods including discrete time pulse detection (DPD), partial response (PR) with Viterbi detection, maximum likelihood sequence detection (MLSD), decision-feedback equalization (DFE), enhanced decision-feedback equalization (EDFE), and fixed-delay tree-search with decision-feedback (FDTS/DF).
In conventional peak detection schemes, analog circuitry responsive to threshold crossing or derivative information detects peaks in the continuous time analog signal generated by the read head. The analog read signal is "segmented" into bit cell periods and interpreted during these segments of time. The presence of a peak during the bit cell period is detected as a "1" bit, whereas the absence of a peak is detected as a "0" bit (i.e., NRZI recording). The most common errors in detection occur when the bit cells are not correctly aligned with the analog pulse data. Timing recovery, then, adjusts the bit cell periods so that the peaks occur in the center of the bit cells on average in order to minimize detection errors. Since timing information is derived only when peaks are detected, the input data stream is normally run length limited (RLL) to limit the number of consecutive "0" bits.
As the pulses are packed closer together on the concentric data tracks in the effort to increase data density, detection errors can also occur due to intersymbol interference (ISI), a distortion in the read signal caused by closely spaced overlapping pulses. This interference can cause a peak to shift out of its bit cell, or its magnitude to decrease, resulting in a detection error. The ISI effect is reduced by decreasing the data density or by employing an encoding scheme to ensure that a minimum number of "0" bits occur between "1" bits. For example, a (d,k) run length limited (RLL) code constrains to d the minimum number of "0" bits between "1" bits, and to k the maximum number of consecutive "0" bits.
Sampled amplitude detection, such as partial response (PR) with Viterbi detection, allows for increased data density by compensating for intersymbol interference. In other words, sampled amplitude read channels can tolerate a controlled amount of ISI, thereby allowing an increase in the linear bit density while maintaining an arbitrary low bit error rate. Unlike conventional peak detection systems, sampled amplitude recording detects digital data by interpreting, at discrete time instances, the actual value of the pulse data. The analog pulses are sampled at the baud rate (code bit rate) and the digital data is detected from these discrete time sample values. A discrete time sequence detector, such as a Viterbi detector, interprets the discrete time sample values in context to determine an estimated digital sequence most likely to have generated the sample values. In this manner, the effect of ISI can be taken into account during the detection process, thereby decreasing the probability of a detection error. This increases the effective signal to noise ratio and, for a given (d,k) constraint, allows for significantly higher data density as compared to conventional analog peak detection read channels.
The application of sampled amplitude techniques to digital communication channels is well documented. See Y. Kabal and S. Pasupathy, "Partial Response Signaling", IEEE Trans. Commun. Tech., Vol. COM-23, pp. 921-934, September 1975; and Edward A. Lee and David G. Messerschmitt, "Digital Communication", Kluwer Academic Publishers, Boston, 1990; and G. D. Forney, Jr., "The Viterbi Algorithm", Proc. IEEE, Vol. 61, pp. 268-278, March 1973.
Applying sampled amplitude techniques to magnetic storage systems is also well documented. See Roy D. Cideciyan, Francois Dolivo, Walter Hirt, and Wolfgang Schott, "A PRML System for Digital Magnetic Recording", IEEE Journal on Selected Areas in Communications, Vol. 10 No. 1, January 1992, pp. 38-56; and Wood et al, "Viterbi Detection of Class IV Partial Response on a Magnetic Recording Channel", IEEE Trans. Commun., Vol. Com-34, No. 5, pp. 454-461, May 1986; and Coker et al, "Implementation of PRML in a Rigid Disk Drive", IEEE Trans. on Magnetics, Vol. 27, No. 6, November 1991; and Carley et al, "Adaptive Continuous-Time Equalization Followed By FDTS/DF Sequence Detection", Digest of The Magnetic Recording Conference, Aug. 15-17, 1994, pp. C3; and Moon et al, "Constrained-Complexity Equalizer Design for Fixed Delay Tree Search with Decision Feedback", IEEE Trans. on Magnetics, Vol. 30, No. 5, September 1994; and Abbott et al, "Timing Recovery For Adaptive Decision Feedback Equalization of The Magnetic Storage Channel", Globecom'90 IEEE Global Telecommunications Conference 1990, San Diego, Calif., November 1990, pp. 1794-1799; and Abbott et al, "Performance of Digital Magnetic Recording with Equalization and Offtrack Interference", IEEE Transactions on Magnetics, Vol. 27, No. 1, January 1991; and Cioffi et al, "Adaptive Equalization in Magnetic-Disk Storage Channels", IEEE Communication Magazine, February 1990; and Roger Wood, "Enhanced Decision Feedback Equalization", Intermag'90.
The format of the data stored on the magnetic disk, as shown in FIG. 1A and 1B, is similar for both peak detection and sampled amplitude read channels. The data is stored as a series of concentric tracks 13 each comprising a number of user data sectors 15 and embedded servo data sectors 17. As illustrated in FIG. 1A, the embedded servo data sectors 17 are recorded at the same data rate across the disk's radius. For the user data sectors 15, however, the disk is partitioned into a number of zones (e.g., an outer zone 11 and an inner zone 27) and the data rate increased in the outer zones in order to achieve a more constant linear bit density. This "zoned" recording technique allows more data to be stored in the outer diameter tracks, thereby increasing the overall capacity of the disk.
FIG. 1B shows the format of a user data sector 15 comprising an acquisition preamble 68, sync mark 70 and data field 72. The read channel processes the acquisition preamble 68 to adjust the magnitude of the read signal and synchronize timing recovery in sampled amplitude read channels so that it can accurately read the data field 72. The sync mark 70 demarks the beginning of the data field 72, and when the read channel detects the sync mark 70, it enables operation of a channel decoder to begin decoding the detected data sequence.
The sync mark 70 must be detected at the correct time or the read channel cannot synchronize to the data field 72. Errors due to noise in the system can cause the read channel to detect the sync mark 70 too early, too late, or fail to detect it altogether. That is, errors in the read signal can cause the read channel to falsely detect the sync mark as the end of the preamble concatenated with the beginning of the sync mark, the end of the sync mark concatenated with the beginning of the user data, or not at all. When this happens, error detection circuitry within the disk controller will recognize that the sync mark was falsely detected or not detected and initiate a re-try. The storage system will wait for the disk to complete a revolution, which increases the overall access time, and again attempt to accurately detect the sync mark.
Conventional sync mark detectors in sampled amplitude read channels detect the sync mark 70 by correlating a target sync mark with the bit sequence detected from the read signal. In order to minimize the probability of early misdetection, the sync mark 70 is selected to have a minimum correlation with the sync mark 70 concatenated with the preamble 68. It is also selected for maximum probability of correct detection when the sync mark is corrupted by errors due to noise. This is accomplished with a computer search program which searches for an appropriate sync mark by correlating a target sync mark with shifted values of the target sync mark appended to the preamble. The search program also correlates the target sync mark with corrupted versions of the sync mark appended to the preamble. Selecting a sync mark to have minimum correlation with the preamble increases the fault tolerance of the sync mark detector.
Prior art sync mark detectors do not use the preamble 68 to assist in detecting the sync mark 70. Instead, conventional sync mark detectors execute a correlation with each new bit detected from the read signal. For example, U.S. Pat. No. 5,384,671 issued to Fisher discloses a sync mark detection technique that selects a sync mark to have minimum correlation with the preamble but does not use information from the preamble in the detection process. Furthermore, prior art sync mark detectors do not use the sign of the sampled data in order to improve the correlation sensitivity.
In the above referenced co-pending patent application entitled "FAULT TOLERANT SYNC MARK DETECTOR FOR COMPARING A SIGN AND MAGNITUDE OF A DETETECTED SEQUENCE TO A TARGET SYNC MARK IN SAMPLED AMPLITUDE MAGNETIC RECORDING" a sync mark detector is disclosed that enhances detection accuracy by exploiting the information provided by the sign of the sample values in the sync mark, as well as by enabling operation of the sync detector relative to a frequency of the acquisition preamble. Although the technique disclosed in that application provides a significant improvement over the prior art, it cannot be used in sampled amplitude read channels employing a time varying sequence detector.
Time varying sequence detectors provide distance enhancing performance gains by matching the detector's state machine to a property in a trellis code. For example, in the above referenced co-pending patent application entitled "TRELLIS CODING SYSTEM FOR DISC STORAGE SYSTEMS" a trellis code is employed which forbids runs of four or more consecutive transitions and allows runs of three consecutive transitions to begin only at every other sample interval (i.e., symbol interval). Consequently, the trellis state machine in the sequence detector alternates between allowing and not allowing three consecutive transitions, depending on the current sample interval. This modification provides coding gain by coding out certain minimum distance error events inherent in a conventional EEPR4 Viterbi algorithm. In order for this technique to work, however, the detector's state machine must be correctly synchronized to the user data so that it knows which sample interval to allow runs of three transitions to begin in. This requires that the sync mark be detected from the channel samples at the input of the sequence detector, rather than from the estimated data output by the sequence detector as in the prior art.
The present invention addresses the need for a fault tolerant sync mark detector capable of detecting a sync mark from the channel samples in order to synchronize the state machine of a time varying sequence detector. Another object of the present invention is to use information from the acquisition preamble in order to further increase the fault tolerance of the sync mark detector.